UKK1: 20220170100001


Module Results

The module was operated in a standard "H8" box supplied by the QMW group.   Water chilled to 19C was passed through the cooling channel of the box such that the temperatures of the powered hybrids, as measured by the two SEMITEC NTC thermistors, were kept steady at 30C.  A flow of dry nitrogen gas inside the box was maintained throughout. Low voltage power was supplied by linear bench supplies.  During the later stages of testing, the cabling was changed to faciliate the use of the linear supplies in a sensed configuration: this change was found to have no effect upon the noise of the module.

Since limited time was available before the module was required at CERN to be irradiated, at RAL no study was made of the TrimDAC performance.  Although this work was performed at CERN before the start of the irradiation, at RAL all studies simply used the trim data that had been established during the testing of the hybrid at Birmingham.   The detectors were biassed to 150V at which the bias current was initially 7microA, but falling with time.  A typical value for the bias current during these tests would be more like 3.8microA.

 

Running with EDGE DETECT OFF, compression mode 1 (X1X):

ResponseVsDelay for bias 220, shaper 20

This plot shows the threshold necessary to attain 50% occupancy for each chip, for injected charges of 1,2,3 and 4fC, as a function of the setting of the delay register.   Based upon this study, the delay register was set to a value of 38 for all subsequent measurements.

ResponseVsShaper for bias 220, delay 38 PLOTS TO FOLLOW

This study simply confirms that the gain increases more or less linearly with the shaper current.

ResponseVsBias for shaper 20, delay 38

ResponseVsBias for shaper 30, delay 38

These plots would seem to suggest that the measured noise can be reduced by running at a higher bias current. Note also that the gain is reduced at higher bias current settings.


Running with EDGE DETECT OFF, compression mode 0 (any hit)

Noise Occupancy for bias 220, shaper 20.  A selection of single channel s curves for link 0 and link 1.

Some channels show the "high occupancy effect", in other words, discontinuities in occupancy in the region of 80% occupancy - but in general the module is clean.

ResponseCurve for bias 220, shaper 20, delay 38. Summary file.

  VT50 Output Noise @ 2fC n(good ch.) Gain Extrapolated Offset Input Noise @ 2fC
M0 170.7 12.56 128 47.5 76.9 1653
S1 169.2 12.19 128 46.2 78.4 1548
S2 168.0 11.28 128 43.1 82.7 1636
S3 168.6 12.07 128 47.3 74.8 1594
S4 169.1 12.21 128 47.4 76.0 1609
E5 170.1 12.09 128 46.9 76.8 1610
M8 168.3 11.58 127 46.4 77.0 1559
S9 170.5 11.73 128 48.0 75.0 1526
S10 171.6 12.31 128 47.9 75.8 1606
S11 170.9 12.02 128 48.5 74.9 1550
S12 170.6 11.60 128 46.7 77.7 1552
E13 168.6 11.57 128 46.5 77.1 1555
  mV mV   mV/fC mV ENC

ResponseCurve for bias 267, shaper 30, delay 38. Summary file.

  VT50 Output Noise @ 2fC n(good ch.) Gain Extrapolated Offset Input Noise @ 2fC
M0 170.6 12.62 128 47.9 75.4 1646
S1 169.2 12.23 128 46.7 76.9 1638
S2 168.0 11.35 128 43.4 81.7 1633
S3 168.6 12.10 128 47.7 73.6 1586
S4 169.1 12.22 128 47.8 74.7 1597
E5 170.1 12.12 128 47.3 75.6 1601
M8 168.2 11.60 127 46.8 75.8 1550
S9 170.5 11.75 128 48.4 74.0 1519
S10 171.6 12.34 128 48.2 74.7 1600
S11 170.9 12.04 128 48.8 73.9 1543
S12 170.5 11.61 128 47.0 76.6 1544
E13 168.5 11.63 128 46.9 76.0 1552
  mV mV   mV/fC mV ENC

TrimDAC Ranges

Plots:

  Before Irradiation After Irradiation
0 TrimDAC Response TrimDAC Response
1 TrimDAC Response TrimDAC Response
2 TrimDAC Response TrimDAC Response
3 TrimDAC Response TrimDAC Response

 

Approximate range values, read from the graphs:

Chip TrimRange = 0 TrimRange = 1 TrimRange = 2 TrimRange = 3
Pre Rad Post Rad Pre Rad Post Rad Pre Rad Post Rad Pre Rad Post Rad
M0 50 40 110 40 160 40 190 40
S1 60 50 115 50 165 155 190 180
S2 60 45 120 100 175 45 200 100
S3 50 40 105 90 150 40 180 90
S4 60 50 115 50 160 50 200 50
E5 60 45 110 110 155 45 200 110
mV mV mV mV mV mV mV mV

The values obtained for the module before irradiation are in close agreement with those from the chip test database.

 

The Configuration Register:

For the irradiated module, running in SENDID mode for each possible value of the TrimRange, the configuration register reports the following values for the first two chips (M0 and S1):

TR=0    1110 10nn nnbb bbbb bb10  0000 0011 1001 0000 0100 0000 0110  0000 0111 1000  0100  0100 0000 01

TR=1    1110 10nn nnbb bbbb bb10  0000 0011 1001 0000 0100 0100 0110  0000 0111 1000  0100  0100 0100 01

TR=2    1110 10nn nnbb bbbb bb10  0000 0011 1001 0000 0100 1000 0110  0000 0111 1000  0100  0100 1000 01

TR=3    1110 10nn nnbb bbbb bb10  0000 0011 1001 0000 0100 1100 0110  0000 0111 1000  0100  0100 1100 01

In other words, the TrimRange bits of the configuration register are being set correctly - at least for these two chips.

 

Increasing Vcc:

to 3.8V makes no difference to the observed TrimDAC ranges in the case where TrimRange=3 (plots).

Finally, if one tries to trim on a chip by chip basis under these condititons, one doesn't do much better.

 


Modified 21.11.00 Comments / questions / suggestions: please contact Peter W Phillips